The process of designing and producing a new integrated circuit device (silicon chip) is very time consuming and requires the efforts of very talented and educated individuals. When a new integrated circuit is designed, the first article produced must be tested as soon as possible to verify that the device is performing in accordance with the design requirements.
The standard, most used process to package an integrated circuit die has been the plastic package, constructed primarily of a metal lead frame and a polymeric insulating material. Because the process of encapsulating die in molded plastic packages can be easily automated, plastic packages are relatively inexpensive compared to ceramic or hybrid hermetic packages and consequently have become the mainstay of the electronics industry.
With a few modifications, the basic assembly process for plastic encapsulation can be used to construct a variety of package types. For example, FIG. 1 illustrates a pin-in-hole package: a dual-in-line package (DIP). FIGS. 2-3 illustrate two surface mount packages: a plastic leaded chip carrier (PLCC) and a quad flatpack (QFP), respectively. Each of these plastic packages are constructed from the same basic assembly techniques, which techniques are well known in the art.
Approximately 80% of the integrated circuits that are sold and produced today are packaged or encapsulated in epoxy using the technique described above. The majority of the integrated circuit packaging industry now resides in countries outside of the United States. Heretofore, there has been relatively little investment in the United States in developing the required hardware tooling and equipment required to accomplish this process, which is very expensive. Thus, most of the tooling and equipment necessary for this process is also manufactured outside the United States. This means that, in most cases, if a company who designs integrated circuits requires integrated circuit dice packaged in epoxy encapsulation, they must pay the price for the offshore service and wait the time it takes for delivery. For companies eager to produce and evaluate new prototype devices, this can translate into costly delays.
Another popular method of packaging the integrated circuit die is to use a package constructed from ceramic. However, ceramic packaging is relatively expensive and is used primarily for high performance, military applications.
If the design is such that performance of the device can be characterized in a substitute package such as a ceramic package, then this provides an alternative method for quick turnaround, providing, of course, that the package is available. However, in many cases, a ceramic package is a poor substitute for simulating the performance of the desired encapsulated device, which is the intended production configuration. That is, in some designs, the function of the integrated circuit die is affected by the presence of the encapsulating material on its surface and the dimensions of the package conductor paths (leads). Thus, it becomes necessary to re-evaluate and validate the design in the final production package configuration. Another disadvantage of the use of ceramic packages for prototype units is that it necessitates a modification of test sockets and printed circuit boards to receive the prototype ceramic packages in order to test and validate the new design.